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Preliminary
SPCA533A
Data Sheet
DIGITAL STILL CAMERA CONTROLLER
Sunplus Camera Solution
SPCA533A
Data Sheet
Version 0.1.0
is a trade mark of Sunplus.
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product
PAGE 1
Preliminary
Data Sheet SPCA533A
1. General Description
The SPCA533A is a highly integrated solution for DSC (Digital Still Camera) application. It consists of image processing engine, image compression engine, the storage interface controller, TV encoder, LCD interface controller and USB interface. The SPCA533A supports a wide range of sensors, including most-commonly used CMOS and CCD sensors. Flexible control of the internal buffer allows the SPCA533A chip to support up to 4-mega pixels image resolution. It also supports many flash memory card interfaces, including CFC, MMC, SMC, and SD. The SPCA533A can also interface to both TFT LCD panels and STN LCD panels for preview. With the fully supports to a DSC's major peripherals, the customers can realize a DSC system with the minimum cost.
2. Features
Dual mode operation, support PC-camera mode and Digital Still camera mode Support major CMOS sensors and CCD sensors CMOS sensors: CIF/100K VGA/300K Agilent HDCS1020, Photobit PB100/101, OmniVision OV6620, Hynix HV7121B, Sharp LZ34C10, TASC TAS5110A, Pixart PAS106B Agilent HDCS2020, Photobit PB320, OmniVision OV7620, Hynix HV7131B, Sharp LZ34B10, PIXART PAS102, TASC TAS5130A, Biomorphic BI8602, IC Media ICM205DL, Motorola SCM20014, National Semiconductor LM9627, Century Semiconductor CS2102 SVGA/500K 1.3M 3M CCD sensors: VGA/300K 800K 1.3 M 1.45M 2.0M 3.0M 4.0M PixelCam PCS2112, Hynix HV7141B OmniVision OV9620, Motorola MCM20027 Y-medai YM3170 Sharp LZ24BP, Sony ICX098AK, Panasonic MN37771 Sony ICX204AK SharpLZ23J3V, Sharp RJ23J3A, Sharp RJ24J3A, Sony ICX202AQ, Panasonic MN39742 Sony ICX205AK Sharp LZ21N3V, RJ23N3A, Sony ICX224AQ, Sony ICX284AQ, Panasonic MN39471 Sony ICX262AQ, Sharp RJ21P3A, Panasonic MN39592 Sony ICX406AQF,
Mechanical shutter and flash light control support Real timer scaling function in the preview and video clip mode Two-dimensional edge enhancement Excellent color correction and interpolation 25 AE/AWB measurement windows, full image coverage Bad-pixel correction up to 256 pixels Built-in TV encoder with DAC, support both NTSC and PAL composite video Digital TV output interface, conform to CCIR601(8-bit/16-bit data bus) and CCIR656 standard Digital TV input interface, CCIR601(8-bit data bus) and CCIR656 Digital TFT LCD output interface, Unipac, Epson, Casio, Prime view Digital STN LCD panel interface for GiantPlus panels Support font-based OSD and graphic-based OSD Support SDRAM interface, 16M/64M/128M/256M Storage media interface, SD/Nand-gate flash/MMC/CFA/SMC Built-in Audio codec Digital AC-97 codec interface (AC-link) IMA ADPCM audio compression/decompression Serial interface to integrate with Sunplus's MP3 decoder (SPCA751) Standard JPEG compression/decompression engine. Built-in 8032 micro-controller with 8K bytes SRAM Support ISP (in-system-programming) function Support ICE interface to ease system development (c) Sunplus Technology Co., Ltd. Proprietary & Confidential PAGE 3 Oct. 24, 2001 Preliminary Version: 0.1.0
Preliminary
Extended external ROM space, up to 1M bytes Four programmable PWM outputs USB1.1 interface, support 10 pipes 3.3V/2.5V dual power supply Package LQFP216/LQFP256/TFBGA280
Data Sheet SPCA533A
3. Functional Block Diagram and Applications
3.1 Functional Block Diagram
SDRAM 16M/64M/128M/256M
SPCA533A
CMS/CCD sensors
sensor interface controller
DRAM controller
DMA controller
USB1.1 controller
PC
R T C
PLL
TV/LCD interface
Color DSP
JPEG engine
Storage media interface controller
Audio controller
8032
Video DAC
external ROM
STN/TFT LCD panel
NandGate flash/ SD/ MMC/ CFA/ SMC
Mic
speaker
Sensor Interface: The sensor interface connects to the CMOS or CCD sensors. It can also connect to a video decoder to capture video. The SPCA533A has built-in a timing generator for the commonly used CCD sensors. A serial interface is used to program the CMOS sensors and external CDS/AGC chips for CCD sensors. RTC: The RTC module enables the SPCA533A to maintain the calendar function with the minimum power consumption. PLL: The SPCA533A has on-chip PLL that allows minimal number of crystals in user applications. The major internal clocks can be generated with a single 27MHz crystal. 8032: The built-in 8032 CPU coordinates the camera operation. The CPU can be disabled when the SPCA533A is connected to an external ICE. TV/LCD Interface Controller: This module has integrated a variety of digital interfaces, which include TFT LCD interface, STN LCD interface, and digital video output interface. It also integrates a TV encoder, supporting both NTSC and PAL composite signal output. The OSD function is also implemented in this module. Both font-based and graphic-based OSD functions are supported. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential PAGE 4 Oct. 24, 2001 Preliminary Version: 0.1.0
AC-link
Audio DAC/A DC
composite output
Preliminary
Data Sheet SPCA533A
Color DSP: Image processing engine of the SPCA533A is a very flexible pipeline. It will perform color interpolation, gamma correction, image scaling for digital zoom, and image enhancement filtering. JPEG Engine: This image compression engine can generate JPEG compressed file in JFIF and EXIF format with firmware support. The engine can also decode JPEG compressed image for playback. DRAM Controller: The DRAM controller provides access path to the SDRAM for the other internal modules of the SPCA533A. Many special functions are also implemented in this module. For example, image scaling, copy and paste of image parts, image rotation, ... etc. DMA Controller: The DMA controller allows high-speed data transfer between SPCA533A internal modules. Storage Media Interface Controller: The storage interface controller is a high efficiency bridge between different storage media protocol and the internal bus. Both DMA data transfer and PIO data transfer are supported. Audio Controller: The SPCA533A's audio controller has built-in standard IMA-ADPCM audio compression. It also integrates the AC-link interface. USB1.1 Controller: The USB controller allows the SPCA533A to communicate with a PC or Mac. The SPCA533A supports all types of USB pipes. (isochronous, bulk, control and interrupt)
3.2 Typical application
flash light control
on-board flash memory
Compact flash memory card
(or other storage media)
USB bus l e n s CCD/CMOS sensors
PC
SPCA533A
AC97 Codec or MP3 decoder
mic DAC
SDRAM
LCD module
firmware (ROM)
TV
(c) Sunplus Technology Co., Ltd. Proprietary & Confidential
PAGE 5
Oct. 24, 2001 Preliminary Version: 0.1.0

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